1. Field of Invention
The present invention pertains to the field of programmable memories. More particularly, this invention relates to memory cell programming with controlled current injection.
2. Art Background
One type of programmable memory cell is commonly referred to as a flash memory cell. The structure of a typical flash memory cell includes a source region and a drain region formed in a silicon substrate. Such a flash memory cell usually includes a stacked gate structure formed on the silicon substrate. Typically, the region of the silicon substrate beneath the stacked gate structure provides a channel region of the flash memory cell.
The stacked gate structure of such a flash memory cell typically includes a pair of polysilicon structures separated by oxide layers. Typically, one of the polysilicon structures functions as a floating gate and the other polysilicon structure functions as a control gate for the flash memory cell. The oxide layer that separates the floating gate from the silicon substrate is commonly referred to as a tunnel oxide layer.
Prior programming operations on such a flash memory cell typically involve the application of a relatively large constant voltage to the drain region of the flash memory cell while an even larger constant voltage is applied to the control gate. During such a prior programming operation, the source region of the flash memory cell is typically maintained at a ground level or a zero voltage level in relation to the voltages applied to the control gate and to the drain region.
Such a relatively high voltage potential applied between the drain and source regions usually causes electron flow through the channel region from the source region to the drain region. The electrons flowing between the source and drain regions can attain relatively high kinetic energy levels near the drain region. In addition, the high constant voltage applied to the control gate typically raises the voltage potential of the floating gate to a high level at the start of the programming operation. Such a high voltage potential on the floating gate usually attracts the electrons flowing through the channel region. Under such conditions, electrons in the channel region having sufficiently high kinetic energy can migrate through the tunnel oxide layer and onto the floating gate. Such migration of electrons through the tunnel oxide layer and onto the flowing gate is commonly referred to as hot carrier programming or hot carrier injection.
Typically, such a prior programming operation involves the injection of sufficient numbers of electrons onto the floating gate to achieve a desired threshold voltage for the flash memory cell. Such a threshold voltage usually specifies a voltage that must be applied to the control gate of the flash memory cell to yield conduction through the channel region during a read operation on the flash memory cell. Typically, the time involved in a such a programming operation depends upon the rate at which electrons are injected onto the floating gate. The slower the rate of injection the longer the programming time to reach the desired threshold voltage.
With such prior programming techniques, the relatively high voltage potential of the floating gate at the start of the programming operation is typically reduced as electrons accumulate on the floating gate. Such a reduction in the voltage potential of the floating gate usually causes a corresponding reduction in the rate of electron injection onto the floating gate. Unfortunately, such a reduction in the rate of electron injection usually increases the time required to program a flash memory cell to the desired threshold voltage. Such increased programming time typically slows the overall speed of flash memory devices that employ such prior programming techniques.
In addition, it is well-known that such hot carrier programming techniques commonly result in the formation of electron-hole pairs in the channel region of the flash memory cell near the drain region. Such electron-hole pairs are typically formed as high energy electrons bombard the crystal lattice structure of the silicon substrate and dislodge other electrons from the lattice.
Moreover, the portions of the channel region near the drain region usually have a relatively high voltage potential due to the high voltage applied to the drain region. As a consequence, the voltage potential of the floating gate can fall below the voltage potential of the portion of the channel region located near the drain region as the voltage level on the floating gate decreases during programming. Under such conditions, holes from the electron-hole pairs that are created in the channel region near the drain region can migrate throughout the tunnel oxide layer and onto the floating gate.
Unfortunately, such migration of holes onto the floating gate typically causes surface damage to the tunnel oxide layer. Such surface damage usually causes long-term reliability problems in the flash memory cell by reducing the rate of injection of electrons onto the floating gate during program operations. In addition, such surface damage can interfere with current flow through the channel region of the flash memory cell during read operations which also results in a reduction in long-term reliability.